Interrupts

Definition

An interrupt is a signal to the processor emitted by hardware or software that temporarily stops the current program execution and requests the CPU to handle an urgent task. After handling the interrupt, execution returns to the interrupted program. Interrupts are essential for handling asynchronous events like I/O completion, hardware failures, and user input.

Need for Interrupts

Why Interrupts?

1. Asynchronous Events: I/O devices finish at unpredictable times - can’t have CPU keep checking
2. Immediate Response: Some events need urgent attention (hardware failure, keyboard input)
3. Efficiency: Without interrupts, CPU would waste time polling devices
4. Responsiveness: System responds quickly to external events
5. Power Saving: CPU can sleep instead of continuously polling

Without Interrupts (Polling)

CPU keeps asking: “Is data ready? Is data ready? Is data ready?”

• Very wasteful of CPU cycles
• Slow response (depends on polling frequency)
• CPU can’t do useful work

With Interrupts (Event-driven)

CPU does useful work until device says “I’m done!” Then CPU stops and handles the device

• Efficient use of CPU
• Fast response
• Device-initiated

Types of Interrupts

1. Hardware Interrupts (External)

Source: Hardware devices send signals through interrupt lines

Examples:

• Timer interrupt (clock tick every millisecond)
• Keyboard interrupt (user presses key)
• Disk interrupt (read/write complete)
• Network interrupt (data arrived)
• Power failure warning
• Memory error detected

Characteristics:

• Come from outside CPU
• Can occur anytime
• Can be disabled/enabled by OS

2. Software Interrupts (Internal)

Source: Running program issues interrupt

Examples:

• System call read(), write(), fork()
• Illegal instruction encountered
• Division by zero
• Invalid memory access
• Privileged instruction in user mode
• Page fault (memory not in RAM)

Characteristics:

• Generated by executing instruction
• Predictable (same instruction always interrupts)
• Synchronous (occurs at specific instruction)

3. Exception

Definition: Unexpected condition detected by CPU during instruction execution

Examples:

• Overflow in arithmetic
• Underflow in floating point
• Privilege violation
• Bounds check violation

Interrupt Handling Process

Step 1: Interrupt Occurs

CPU executing instruction → Hardware detects interrupt signal → CPU finishes current instruction

Step 2: Interrupt Detection

• CPU checks interrupt request line at end of each instruction cycle
• If signal present, CPU knows interrupt occurred
• Identifies which device/signal caused interrupt

Step 3: Save Context

OS saves:

• Program Counter (next instruction to execute)
• CPU Registers (current register values)
• Program Status Word (PSW): flags, privilege level
• Stack Pointer

Why save? To resume interrupted program later from exact same point

Step 4: Look Up Handler

Interrupt Vector: Table of addresses of interrupt handlers

Interrupt Vector:
  Interrupt 0 → Address of Timer Handler (0x1000)
  Interrupt 1 → Address of Keyboard Handler (0x2000)
  Interrupt 2 → Address of Disk Handler (0x3000)
  Interrupt 3 → Address of Network Handler (0x4000)

• OS looks up which handler to execute based on interrupt number
• Jumps to handler address

Step 5: Execute Interrupt Handler

Interrupt Service Routine (ISR):

• Code that handles the interrupt
• Runs in kernel mode (privileged)
• Example: Keyboard ISR reads key pressed, puts in buffer

Keyboard ISR:

1. Read key from keyboard device
2. Store in input buffer
3. Wake up waiting process (if any)
4. Return from interrupt

Step 6: Return from Interrupt

OS restores:

• Program Counter (from saved context)
• CPU Registers (from saved context)
• Program Status Word
• Stack Pointer

Resumed program continues as if never interrupted

Interrupt vs Trap

Interrupt Priorities

What if Multiple Interrupts Occur?

Scenario: While handling keyboard interrupt, disk finishes I/O → What to do?

Priority Levels

OS assigns priority to different interrupt types:

1. High Priority: Power failure, hardware errors
2. Medium Priority: Disk I/O completion
3. Low Priority: Keyboard input, network

Rule: Higher priority interrupt can interrupt lower priority handler

Masking Interrupts

• Disable Interrupts: CPU can turn off interrupt processing
• Enable Interrupts: Turn interrupt processing back on
• Used during critical sections where interruption is dangerous

Interrupt Latency

Definition: Time from when interrupt occurs until handler starts executing

Components of Latency

1. Recognition Time: Time to detect interrupt signal
2. Acceptance Time: Time for CPU to finish current instruction
3. ISR Lookup Time: Time to find handler in vector
4. Context Save Time: Time to save registers
5. Handler Execution Time: Time to execute ISR

Real-Time Systems

Must have predictable, bounded interrupt latency:

• Must respond within specific time
• Critical for safety systems
• Used in aircraft, medical devices, industrial control

Advantages of Interrupts

1. Efficiency: CPU doesn’t waste time polling
2. Responsiveness: Immediate response to events
3. Asynchronous: Handles unpredictable events
4. Multitasking: Multiple devices serviced concurrently
5. Power Saving: CPU can sleep until interrupted
6. Scalability: Works with many devices

Disadvantages

1. Complexity: Interrupt handling adds complexity
2. Overhead: Context saving/restoring takes time
3. Latency: Unpredictable delays possible
4. Debugging: Hard to debug interrupt-driven programs
5. Race Conditions: Multiple interrupts can cause synchronization issues
6. Stack Overhead: Interrupt handlers use stack space

Real-World Examples

Keyboard Interrupt Flow

1. User presses ‘A’ key
2. Keyboard sends interrupt signal to CPU
3. CPU saves context (PC, registers)
4. OS looks up keyboard handler in interrupt vector
5. Keyboard ISR executes: reads ‘A’, stores in buffer
6. ISR signals waiting process (terminal) that data available
7. Returns from interrupt
8. CPU restores context
9. Interrupted program resumes
10. Process reading keyboard wakes up, gets ‘A’

Disk I/O Interrupt Flow

1. Process requests disk read
2. OS sends command to disk
3. Process blocks (goes to waiting state)
4. Disk does I/O (millions of CPU cycles later)
5. Disk sends interrupt when done
6. CPU saves context
7. Disk ISR executes: notifies OS data ready
8. OS moves reading process to ready queue
9. Returns from interrupt
10. CPU resumes interrupted program (or runs another process)
11. Later, reading process runs and gets data

Summary

Interrupts are fundamental mechanism for handling asynchronous events efficiently. Without interrupts, OS would waste CPU cycles polling devices. With interrupts, system responds quickly to events while keeping CPU productive. Understanding interrupt handling is essential for understanding OS I/O management and real-time systems.