Logical vs Physical Address Space

Definition

Logical Address: Virtual address generated by CPU during program execution

Physical Address: Actual address in physical RAM where data resides

Address Space: Range of addresses available to program

Two address spaces allow OS to manage memory independently from program view.

Comparison

Logical Address Space

Definition

Logical Address: Virtual memory address that process sees and uses

Also called: Virtual Address

How Program Creates Logical Addresses

C Program:
int x = 10;
int *ptr = &x;  // Logical address of x
printf("%p", ptr);  // Print logical address

Compiled to:

Memory:
Logical Address | Value
─────────────────────────
    4000        | 10  (variable x)
    4004        | 4000 (pointer ptr)

Program’s View

Process thinks:
"I have 4GB of memory"
(on 32-bit system)

Actually allocated:
Maybe only 128MB
Rest on disk or simply unavailable

Process doesn't know!
OS provides illusion of large space

Logical Address Space Properties

1. Per-Process: Each process has own logical address space

Process A logical address 1000 ≠ Process B logical address 1000

Physical memory:
Address 1000 might hold:
- Process A's data (as seen by Process A)
- OR Process B's data (as seen by Process B)

2. Starts at 0:

Logical addresses: 0, 1, 2, 3, ..., 2^32-1 (on 32-bit system)

3. Isolated:

Process A writes to logical address 1000
Process B reads logical address 1000
Different physical locations!
Protection maintained!

Logical Address Components

Address divided into:

Logical Address: 1234567 (example)

┌────────────────────┬──────────────┐
│  Page/Segment #    │   Offset     │
│    (high bits)     │  (low bits)  │
└────────────────────┴──────────────┘
      12345            67

Page Number: Which page/segment? Offset: Position within page/segment

Physical Address Space

Definition

Physical Address: Actual location in RAM

Only physical addresses exist in hardware.

How OS Creates Physical Addresses

Memory Management Unit (MMU) translates:

Logical Address 1234567
    ↓
MMU: "Which page?"
Page number: 12345
"Where is that page in RAM?"
Page Table[12345] = Frame 567
"Physical address = 567*pagesize + offset"
Physical Address: 567*4096 + 67 = 2322627
    ↓
Access RAM at 2322627

Physical Address Space Properties

1. System-wide: Same physical addresses across all processes

Physical RAM location 1000:
Contains specific data
Any process accessing that location sees that data

2. Starts at 0:

Physical addresses: 0 to max_RAM_address

3. Protected: OS prevents unauthorized access

Process tries: Physical 1000
OS checks: "Does your memory protection allow this?"
If allowed: Access granted
If not allowed: Segmentation fault!

Physical Address Components

Same structure but different interpretation:

Physical Address: 2322627

┌──────────────────┬───────────────┐
│   Frame #        │    Offset     │
│ (high bits)      │  (low bits)   │
└──────────────────┴───────────────┘
      567              67

Frame Number: Which physical frame in RAM? Offset: Position within frame

Address Translation (Paging Example)

Step-by-Step

Logical Address: 8192

Step 1: Extract page number and offset
  Page size: 4096 bytes
  Page number = 8192 / 4096 = 2
  Offset = 8192 % 4096 = 0

Step 2: Look up page table
  Page Table[2] = Frame 5

Step 3: Calculate physical address
  Physical = Frame * PageSize + Offset
  Physical = 5 * 4096 + 0
  Physical = 20480

Step 4: Access RAM
  Memory[20480] contains actual data

Example: Real Program

C Code:
int array[1000];
printf("%p\n", array);  // Print address

Logical address (what program sees):
0x7fff1234 (4294734388 in decimal)
4GB address space, upper region

Actual physical addresses:
Could be: 0x1a230 (lower RAM)
          0x2b450 (middle RAM)
          0x3a090 (upper RAM)
Scattered throughout!

MMU maps virtual to physical on each access

Memory Management Unit (MMU)

Hardware Component

CPU asks MMU: “Where is logical address X?”

CPU Register File
    │
    ├─ Instruction: "Load from address 1000"
    │
    ↓
MMU (Memory Management Unit)
    │
    ├─ Look up: Page Table[1000/4096]
    ├─ Find: Physical Frame = ?
    ├─ Calculate: Physical Address = ?
    │
    ↓
Physical Memory
    │
    └─ Fetch data at physical address

Translation Lookaside Buffer (TLB)

MMU has small cache of recent translations:

TLB Cache (16-512 entries):
Logical Page | Physical Frame
─────────────┼────────────────
     10      |      5
     20      |      12
     25      |      3
     30      |      8

Lookup logical address:
Page 20 in TLB? Yes! Frame = 12
No page table access needed!
Fast path!

Page 40 not in TLB?
Access page table
Update TLB with new entry

Impact:

• TLB hit: 1-2 nanoseconds (fast!)
• TLB miss: 10-20 nanoseconds (slow)
• 95-99% hit rate in modern systems

Advantages of Logical vs Physical Separation

1. Relocation

Process doesn’t care where physically loaded:

Program compiled with logical addresses: 0-4GB
Can load at:
- Physical 0-4GB
- Physical 100MB-104GB
- Different location each boot

Program works unchanged!
No recompilation needed!

2. Protection

Processes isolated from each other:

Process A logical 0: Protected as Process A data
Process B logical 0: Protected as Process B data

Even if same physical location (shared library):
Access control enforced by MMU

3. Virtual Memory

Process can be larger than RAM:

Process needs: 1GB
RAM available: 512MB
OS keeps:
- 512MB in RAM (active pages)
- 512MB on disk (inactive pages)

Process sees: 1GB available
Actually uses: Mix of RAM and disk

4. Sharing

Programs share code/data:

C library (libc) shared by 1000 programs
Logical addresses different for each:
- Process A: logical page 10 → Frame 50 (libc code)
- Process B: logical page 20 → Frame 50 (same libc code)
- Process C: logical page 5 → Frame 50 (same libc code)

One physical copy, many logical views!
Saves memory: 1MB code × 1 copy instead of 1000 copies

Disadvantages

1. Translation Overhead

Every memory access needs translation:

Without MMU:
Memory access: 1 operation

With MMU:
Memory access = "Look up page table" + "Access memory"
             = 2 operations

TLB mitigates but doesn't eliminate

2. Complexity

• More hardware (MMU, TLB)
• More software (page tables, algorithms)
• Harder to debug
• More latency sensitive

3. Memory Overhead

Page tables consume memory:

Process: 1000 processes
Page table size: 1MB each
Total for page tables: 1000 MB!

Modern Systems

All modern systems use logical/physical separation:

Windows: Paging with 4KB pages
Linux: Paging with 4KB or 2MB/1GB pages
macOS: Paging with 4KB pages
Mobile: Paging with variable page sizes

All use TLB (hardware MMU)
All use page tables
All support virtual memory

Summary

Logical addresses are what programs see (virtual), physical addresses are actual RAM locations. MMU translates logical to physical using page tables with TLB caching. Separation enables relocation, protection, virtual memory, and sharing. Every address access incurs translation overhead (minimized by TLB hit). Modern systems mandate this separation for memory protection and flexibility. Understanding distinction crucial for comprehending virtual memory and paging systems.