Logic Gates

Introduction to Logic Gates

Logic gates are the physical implementation of Boolean functions. They are the fundamental building blocks of digital circuits, from simple devices to complex computers.

A logic gate is an electronic device that:

  • Accepts one or more binary inputs
  • Produces a single binary output
  • Implements a Boolean function

Basic Logic Gates

1. NOT Gate (Inverter)

Symbol:

    x ──┬─>○── y

Function: Inverts the input

Boolean Expression: y = x̄ or y = NOT x

Truth Table:

Input (x)Output (y)
01
10

Properties:

  • 1 input, 1 output
  • Simplest gate
  • Also called inverter

Example:

  • Input: 1 → Output: 0
  • Input: 0 → Output: 1

2. AND Gate

Symbol:

    x ──┐
        ├──── y
    z ──┘

Function: Output is 1 only when ALL inputs are 1

Boolean Expression: y = x · z or y = x ∧ z

Truth Table:

xzy (x·z)
000
010
100
111

Properties:

  • 2 or more inputs, 1 output
  • Output = 1 only if ALL inputs = 1
  • Commutative: x·z = z·x

Applications:

  • Masking operations
  • Enabling circuits
  • Control logic

3. OR Gate

Symbol:

    x ──┐
        )──── y
    z ──┘

Function: Output is 1 when AT LEAST ONE input is 1

Boolean Expression: y = x + z or y = x ∨ z

Truth Table:

xzy (x+z)
000
011
101
111

Properties:

  • 2 or more inputs, 1 output
  • Output = 1 if ANY input = 1
  • Commutative: x+z = z+x

Applications:

  • Combining signals
  • Decision logic
  • Alert systems

4. NAND Gate (NOT-AND)

Symbol:

    x ──┐
        ├─>○── y
    z ──┘

Function: Opposite of AND (inverted AND)

Boolean Expression: y = (x · z)’ or y = x̄ + z̄

Truth Table:

xzy (NAND)
001
011
101
110

Special Properties:

  • Functionally complete - can build ANY logic circuit using only NAND gates!
  • Universal gate
  • Cheaper and faster than other gates in CMOS

Building Other Gates from NAND:

NOT: x NAND x = x̄

AND: (x NAND y) NAND (x NAND y) = xy

OR: (x NAND x) NAND (y NAND y) = x + y

5. NOR Gate (NOT-OR)

Symbol:

    x ──┐
        )─>○── y
    z ──┘

Function: Opposite of OR (inverted OR)

Boolean Expression: y = (x + z)’ or y = x̄ · z̄

Truth Table:

xzy (NOR)
001
010
100
110

Special Properties:

  • Also functionally complete!
  • Universal gate
  • Can build any circuit using only NOR

Building Other Gates from NOR:

NOT: x NOR x = x̄

OR: (x NOR y) NOR (x NOR y) = x + y

AND: (x NOR x) NOR (y NOR y) = xy

6. XOR Gate (Exclusive OR)

Symbol:

    x ──┐
        )═══ y
    z ──┘

Function: Output is 1 when inputs are DIFFERENT

Boolean Expression: y = x ⊕ z = x̄z + xz̄

Truth Table:

xzy (x⊕z)
000
011
101
110

Properties:

  • Output = 1 when inputs differ
  • Output = 0 when inputs are same
  • Commutative: x ⊕ z = z ⊕ x
  • Associative: x ⊕ (y ⊕ z) = (x ⊕ y) ⊕ z

Applications:

  • Parity checking
  • Addition circuits (half adder)
  • Error detection
  • Comparison

Special Properties:

  • x ⊕ 0 = x
  • x ⊕ 1 = x̄
  • x ⊕ x = 0
  • x ⊕ x̄ = 1

7. XNOR Gate (Exclusive NOR)

Symbol:

    x ──┐
        )══>○── y
    z ──┘

Function: Output is 1 when inputs are SAME (equality detector)

Boolean Expression: y = (x ⊕ z)’ = xz + x̄z̄

Truth Table:

xzy (XNOR)
001
010
100
111

Properties:

  • Output = 1 when inputs are equal
  • Also called equivalence gate
  • Complement of XOR

Applications:

  • Equality checking
  • Error detection
  • Digital comparators

Gate Characteristics

Fan-in

Definition: Number of inputs a gate can accept

Examples:

  • NOT gate: fan-in = 1
  • 2-input AND: fan-in = 2
  • 4-input OR: fan-in = 4

Fan-out

Definition: Number of gates that can be driven by a single output

Example: One AND gate output feeding 5 other gates = fan-out of 5

Propagation Delay

Definition: Time taken for output to change after input change

Typical values: 1-10 nanoseconds for modern gates

Power Consumption

Energy used by the gate during operation.

Combinational Circuits

Definition

A combinational circuit is a circuit where:

  • Output depends ONLY on current inputs
  • No memory elements
  • No feedback loops

Examples: Adders, multiplexers, encoders, decoders

Example 1: Half Adder

Purpose: Add two 1-bit numbers

Inputs: A, B Outputs: Sum (S), Carry (C)

Truth Table:

ABSum (S)Carry (C)
0000
0110
1010
1101

Boolean Expressions:

  • Sum = A ⊕ B
  • Carry = A · B

Circuit:

  • XOR gate for Sum
  • AND gate for Carry

Example 2: Full Adder

Purpose: Add two 1-bit numbers plus carry-in

Inputs: A, B, Cin Outputs: Sum (S), Carry out (Cout)

Boolean Expressions:

  • Sum = A ⊕ B ⊕ Cin
  • Cout = AB + ACin + BCin = AB + (A⊕B)Cin

Circuit: Two half adders + OR gate

Example 3: 2-to-1 Multiplexer

Purpose: Select one of two inputs based on control signal

Inputs: I0, I1, S (select) Output: Y

Truth Table:

SY
0I0
1I1

Boolean Expression: Y = S̄I0 + SI1

Circuit:

  • 2 AND gates
  • 1 OR gate
  • 1 NOT gate

Example 4: 2-to-4 Decoder

Purpose: Convert 2-bit input to 4 output lines (one active)

Inputs: A, B Outputs: Y0, Y1, Y2, Y3

Truth Table:

ABY0Y1Y2Y3
001000
010100
100010
110001

Expressions:

  • Y0 = Ā·B̄
  • Y1 = Ā·B
  • Y2 = A·B̄
  • Y3 = A·B

Implementing Boolean Functions with Gates

From SOP Expression

Steps:

  1. Each product term → AND gate
  2. OR all AND outputs

Example: f = AB + ĀC

Circuit:

  1. AND gate: A, B → AB
  2. AND gate: Ā, C → ĀC
  3. OR gate: AB, ĀC → f

Gates needed: 2 AND, 1 OR, 1 NOT

From POS Expression

Steps:

  1. Each sum term → OR gate
  2. AND all OR outputs

Example: f = (A+B)·(Ā+C)

Circuit:

  1. OR gate: A, B → (A+B)
  2. OR gate: Ā, C → (Ā+C)
  3. AND gate: (A+B), (Ā+C) → f

Gates needed: 2 OR, 1 AND, 1 NOT

Two-Level Implementation

SOP: AND-OR (2 levels) POS: OR-AND (2 levels)

Advantages:

  • Predictable delay
  • Easier to design
  • Standard approach

Multi-Level Implementation

Example: f = (AB + CD)(E + F)

Advantages:

  • Fewer total gates
  • Less chip area
  • Lower power

Disadvantages:

  • More delay (longer path)
  • More complex design

Universal Gates: NAND and NOR

Why Universal?

Because you can build:

  • NOT gates
  • AND gates
  • OR gates
  • Any other gates!

Using ONLY NAND (or ONLY NOR)

Practical Advantages

  1. Manufacturing: Easier to produce one type of gate
  2. Cost: Bulk production reduces cost
  3. Speed: NAND/NOR typically fastest in CMOS
  4. Flexibility: Can build anything with one gate type

Example: Implementing f = AB + CD using NAND

Original: 2 AND gates + 1 OR gate

NAND version:

  1. AB using NAND: (A NAND B) NAND (A NAND B)
  2. CD using NAND: (C NAND D) NAND (C NAND D)
  3. OR using NAND: (AB NAND AB) NAND (CD NAND CD)

Gate Symbols Summary

GateSymbolExpressionOutput=1 when
NOT──>○ȳ = x̄x = 0
AND──┐├──y = x·zx=1 AND z=1
OR──┐)──y = x+zx=1 OR z=1
NAND──┐├>○y = (xz)‘NOT(x AND z)
NOR──┐)>○y = (x+z)‘NOT(x OR z)
XOR──┐)══y = x⊕zx ≠ z
XNOR──┐)═>○y = x⊙zx = z

Practical Considerations

1. Gate Delays

Longer paths = more delay = slower circuit

Example:

  • Single gate: 5 ns
  • 3-level circuit: 15 ns
  • 5-level circuit: 25 ns

2. Power Consumption

More gates = more power = more heat

3. Cost

Fewer gates = cheaper circuit = lower manufacturing cost

4. Reliability

Simpler circuits = fewer components = more reliable

Standard Logic Families

TTL (Transistor-Transistor Logic)

  • Older technology
  • Fast
  • Higher power consumption

CMOS (Complementary Metal-Oxide-Semiconductor)

  • Modern standard
  • Very low power when static
  • High integration density
  • Most common today

ECL (Emitter-Coupled Logic)

  • Fastest
  • Very high power
  • Expensive
  • Used in high-speed applications

Key Points for Exams

  1. 7 basic gates: NOT, AND, OR, NAND, NOR, XOR, XNOR
  2. NAND and NOR are universal - can build any circuit
  3. XOR output = 1 when inputs differ
  4. XNOR output = 1 when inputs are same
  5. AND: all inputs 1 → output 1
  6. OR: any input 1 → output 1
  7. Two-level implementation: SOP = AND-OR, POS = OR-AND
  8. Know gate symbols for all 7 gates
  9. Half adder: Sum = A⊕B, Carry = AB
  10. Propagation delay increases with circuit depth

Practice Problems

  1. Draw the logic circuit for f = AB + ĀC

  2. Implement 3-input OR using only 2-input NOR gates

  3. Design a half adder using XOR and AND gates

  4. Convert f = (A+B)(C+D) to NAND-only circuit

  5. What is the output of XOR gate when both inputs are 1?

  6. How many 2-input NAND gates needed to implement NOT?

  7. Design a circuit to detect when 3-bit input is 101

  8. Implement f = ABC + ĀB̄C̄ using minimum gates

  9. What gate gives output 1 only when inputs are equal?

  10. Draw a 2-to-1 multiplexer using basic gates